The HiPEG+ is the 2nd generation MPEG-2 HDTV Decoder which combines the functions transport demux, video decoder, display processor and 32bit RISC CPU into a single ASIC in a 352Pin BGA package. By using 0.25 µm Gate Array technology from Fujitsu this device offers excellent performance/price ratio with low power dissipation. Its digital interfaces for transport, audio and video make this ASIC ideally suitable for digital-only solutions.

MikroM offers the HiPEG+ Intellectual Property IP to ASIC designers for integration into their own technology. The know-how of two ASIC generations and the application of the ASIC in boards and systems give MikroM customers the guaranty of support for all levels, from system down to core MPEG.